composite composite/steane/memory2@1 · superseded by @2 (superseded · failed under current verifier) · raw JSON
memory2
versions: @1 · @2 (latest)
Logical action
MZ 0 → m_out
Circuit
One wire per logical qubit; brackets group the wires of a code block. Boxes are the declared logical actions of the steps; blue boxes are composites; double lines carry a measured bit into a conditional step.
Steps
| # | label | condition | applies | blocks | |
|---|---|---|---|---|---|
| 0 | steane_se_z_round#0 | steane/se-z-round@1 | A → A | bits_out se.syn0→r0.syn0, se.syn1→r0.syn1, se.syn2→r0.syn2 | |
| 1 | steane_readout_z_decoded#0 | steane/readout-z-decoded@1 | A → — |
ports in: A: steane · ports out: none
Run recipes
No run recipes for this entry yet.
Verification
| field | value |
|---|---|
| status | failed |
| method | bell-choi-exact-v1 |
| date | 2026-10-07 |
| tools.adaptq | 433813df312502c551d89f624375e0124f4cebbb |
| failure | adaptq.store.load: StoreError: gate 'gate/steane/se-z-round': records.internal 'se.syn0' does not match [a-z][a-z0-9_]* (spec §4.3) |
Provenance
| field | value |
|---|---|
| submitter | ikim |
| source | adaptq builtins, exported by adaptq.store |
| created | 2026-10-06 |