{
  "id": "gate/surface-rot-5/se-z-round",
  "version": 1,
  "kind": "gate",
  "name": "surface_rot5_se_z_round",
  "provenance": {
    "submitter": "ikim",
    "source": "adaptq.gates_generic on code/surface-rot-5; exported from adaptq 2612aa6",
    "created": "2026-10-07",
    "notes": ""
  },
  "verification": {
    "status": "verified",
    "method": "bell-choi-exact-v1",
    "patterns_checked": 1,
    "tools": {
      "adaptq": "433813df312502c551d89f624375e0124f4cebbb",
      "xtim": "xtim-engine-9"
    },
    "date": "2026-10-07",
    "patterns_total": 1
  },
  "code_in": [
    "code/surface-rot-5@1"
  ],
  "code_out": [
    "code/surface-rot-5@1"
  ],
  "qubit_map_in": [
    [
      0,
      1,
      2,
      3,
      4,
      5,
      6,
      7,
      8,
      9,
      10,
      11,
      12,
      13,
      14,
      15,
      16,
      17,
      18,
      19,
      20,
      21,
      22,
      23,
      24
    ]
  ],
  "qubit_map_out": [
    [
      0,
      1,
      2,
      3,
      4,
      5,
      6,
      7,
      8,
      9,
      10,
      11,
      12,
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      14,
      15,
      16,
      17,
      18,
      19,
      20,
      21,
      22,
      23,
      24
    ]
  ],
  "action": [],
  "records": {
    "internal": [
      "se__dsyn0",
      "se__dsyn1",
      "se__dsyn2",
      "se__dsyn3",
      "se__dsyn4",
      "se__dsyn5",
      "se__dsyn6",
      "se__dsyn7",
      "se__dsyn8",
      "se__dsyn9",
      "se__dsyn10",
      "se__dsyn11"
    ]
  },
  "circuit": "R 25\nR 26\nR 27\nR 28\nR 29\nR 30\nR 31\nR 32\nR 33\nR 34\nR 35\nR 36\nTICK\nH 25\nH 26\nH 27\nH 28\nH 29\nH 30\nH 31\nH 32\nH 33\nH 34\nH 35\nH 36\nTICK\nCZ 25 0\nCZ 26 2\nCZ 29 10\nCZ 35 4\nTICK\nCZ 25 1\nCZ 26 3\nTICK\nCZ 25 5\nCZ 26 7\nTICK\nCZ 25 6\nCZ 26 8\nCZ 33 5\nTICK\nH 25\nH 26\nCZ 27 6\nCZ 28 8\nCZ 33 10\nTICK\nCZ 27 7\nCZ 28 9\nH 33\nTICK\nCZ 27 11\nCZ 28 13\nCZ 35 9\nTICK\nCZ 27 12\nCZ 28 14\nCZ 29 11\nH 35\nTICK\nH 27\nH 28\nCZ 29 15\nCZ 30 12\nCZ 36 14\nTICK\nCZ 29 16\nCZ 30 13\nCZ 34 15\nTICK\nH 29\nCZ 30 17\nCZ 31 16\nCZ 34 20\nTICK\nCZ 30 18\nCZ 31 17\nH 34\nTICK\nH 30\nCZ 31 21\nCZ 32 18\nTICK\nCZ 31 22\nCZ 32 19\nTICK\nH 31\nCZ 32 23\nCZ 36 19\nTICK\nCZ 32 24\nH 36\nTICK\nH 32\nTICK\nM 25\nDETECTOR rec[-1]\nDECISION(0) rec[-1]\nM 26\nDETECTOR rec[-1]\nDECISION(1) rec[-1]\nM 27\nDETECTOR rec[-1]\nDECISION(2) rec[-1]\nM 28\nDETECTOR rec[-1]\nDECISION(3) rec[-1]\nM 29\nDETECTOR rec[-1]\nDECISION(4) rec[-1]\nM 30\nDETECTOR rec[-1]\nDECISION(5) rec[-1]\nM 31\nDETECTOR rec[-1]\nDECISION(6) rec[-1]\nM 32\nDETECTOR rec[-1]\nDECISION(7) rec[-1]\nM 33\nDETECTOR rec[-1]\nDECISION(8) rec[-1]\nM 34\nDETECTOR rec[-1]\nDECISION(9) rec[-1]\nM 35\nDETECTOR rec[-1]\nDECISION(10) rec[-1]\nM 36\nDETECTOR rec[-1]\nDECISION(11) rec[-1]\nTICK\n"
}